Javier
Mateos López
![Foto de Javier](/img/uploaded/9613D5EFB8DFA25667C404CCC1E1068C.jpg)
![Foto de Intel Corporation, Systems Research Center, Systems Technology Lab.](/img/noimage_org.png)
Intel Corporation, Systems Research Center, Systems Technology Lab.
San Jose, EE. UU.Publicaciones en colaboración con investigadores/as de Intel Corporation, Systems Research Center, Systems Technology Lab. (1)
2011
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Exploring digital logic design using ballistic deflection transistors through monte carlo simulations
IEEE Transactions on Nanotechnology, Vol. 10, Núm. 6, pp. 1337-1346